PSoC5LP Lab23: Building a UART‑Based Single‑Application Bootloader

Objective

Upon completion of this lab, you will be able to:

  • Explain the architecture and flash memory layout of PSoC 5LP bootloader systems
  • Design and implement Single-Application, Dual-Application, Launcher-Combination, Upgradeable Stack, and Dual-Application with Combination bootloader projects using PSoC Creator 4.4
  • Evaluate the trade-offs among bootloader architectures in terms of update safety, flash utilization, and field upgradeability.
  • Verify bootloader operation by transferring .cyacd firmware files via the PSoC Bootloader Host tool and observing application behavior on hardware.

Overview

A bootloader is a small program that runs immediately after a microcontroller resets. Its primary responsibility is to receive new firmware from an external host, write it into flash memory, verify its integrity, and transfer execution to the updated application. Bootloaders are essential in deployed embedded products that require firmware updates in the field without physical access to a programmer.

The PSoC 5LP (Programmable System-on-Chip 5 Low Power) from Infineon (formerly Cypress Semiconductor) provides a flexible bootloader framework through PSoC Creator. This framework offers pre-built Bootloader and Bootloadable components that handle the communication protocol, flash write operations, metadata management, and application validation automatically.

PSoC Creator supports five distinct bootloader architectures of increasing complexity:

  1. Single-Application Bootloader — The simplest configuration. One bootloader project resides at the base of flash, and one bootloadable application occupies the remainder of the flash. The bootloader receives updates from a host and installs them in place of the application.
  2. Dual-Application Bootloader — Two application slots exist in flash. The bootloader always writes to the inactive slot, preserving the running application until the update is complete and verified. This prevents a failed update from bricking the device.
  3. Launcher and Combination Bootloader — A minimal bootloader (the Launcher) handles only application selection and jumping. Each application slot is a Combination project — it contains both a Bootloadable component (so it can be updated) and a Bootloader component (so it can update the other slot). This allows the update logic itself to be updated.
  4. Upgradeable Stack — Extends the Combination concept so that even the base bootloader can be replaced in the field. The entire firmware stack — bootloader and applications — is updatable without a programmer.
  5. Dual-Application Bootloader with Combination Project — Combines the safety of the dual-application scheme with the flexibility of the Combination project, providing both atomic slot-switching and updatable communication logic.

In all architectures, firmware update files use the .cyacd format and are transferred to the device using the PSoC Bootloader Host tool bundled with PSoC Creator.


A Single-Application Bootloader is the simplest PSoC 5LP bootloader configuration. It consists of two separate PSoC Creator projects that work together:

  • Bootloader Project (Exp1_BL): A small program stored at the base of flash memory. It runs immediately after reset, waits for a firmware update command from a host computer via UART, and if received, writes the new application firmware into flash. If no command arrives within the timeout period, execution is transferred to the existing application.
  • Bootloadable Project (Exp1_App): The actual application firmware stored above the Bootloader in flash. It is launched by the Bootloader after verification. In this experiment, it reads the state of the onboard switch SW1 and controls the onboard LED1 accordingly.

The firmware update file generated by the Bootloadable project is a .cyacd file, transferred to the device using the PSoC Bootloader Host tool via UART at 115200 baud.

Flash memory layout for this experiment:


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